wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Collapse)	Author	Files	Lines
2019-04-23	clk: core: replace clk_{readl,writel} with {readl,writel}	Jonas Gorski	1	-2/+2
	Now that clk_{readl,writel} is just an alias for {readl,writel}, we can switch all users of clk_* to use the accessors directly and remove the helpers. Signed-off-by: Jonas Gorski <[email protected]> [[email protected]: Also convert renesas file so that this can be compile independently] Signed-off-by: Stephen Boyd <[email protected]>
2018-12-10	clk: hisilicon: Remove usage of CLK_IS_BASIC	Stephen Boyd	1	-1/+1
	This flag doesn't look to be used by any code, just set in various clk init structures and then never tested again. Remove it from these drivers as it doesn't provide any benefit. Cc: Jiancheng Xue <[email protected]> Cc: Leo Yan <[email protected]> Cc: Jianguo Sun <[email protected]> Cc: Wei Yongjun <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2018-03-14	clk: hisilicon: Mark phase_ops static	Stephen Boyd	1	-1/+1
	Sparse rightfully complains: drivers/clk/hisilicon/clk-hisi-phase.c:88:22: warning: symbol 'clk_phase_ops' was not declared. Should it be static? drivers/clk/hisilicon/clk-hisi-phase.c:88:22: warning: symbol 'clk_phase_ops' was not declared. Should it be static? Signed-off-by: Stephen Boyd <[email protected]>
2018-03-12	clk: hisilicon: add hisi phase clock support	tianshuliang	1	-0/+121
	Add a phase clock type for HiSilicon SoCs,which supports clk_set_phase operation. Signed-off-by: tianshuliang <[email protected]> Signed-off-by: Jiancheng Xue <[email protected]> Signed-off-by: Shawn Guo <[email protected]>